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The Hottest Chip Research Institute! SemiAnalysis Founder: Computational Power Bottleneck Shifts from CoWoS to EUV, Storage to Consume 30% of Capital Expenditure
The founder of SemiAnalysis stated that the bottleneck for AI computing power expansion is akin to a game of 'whack-a-mole,' constantly shifting. Currently, the bottleneck may return to chip manufacturing. The surge in demand for High Bandwidth Memory (HBM) driven by inference models consumes four times as many wafers as standard DRAM, potentially halving smartphone shipments. By 2026, 30% of tech giants' capital expenditure will be absorbed by memory-related costs. Electricity is not the ultimate constraint, as solutions such as aeroderivative gas turbines and fuel cells can address energy needs. The ultimate ceiling may emerge after 2028, tied to ASML’s production capacity of fewer than a hundred EUV lithography machines annually.
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