Facing strong catch-up by Samsung and Intel, TSMC's leading position is being challenged as never before. Intel even shouted the slogan of “Reclaiming the world's chip manufacturing crown.” Will it be surpassed, or will it continue to hold the throne?

Recently, TSMC unveiled a series of new chip technologies at the North American Technology Forum, once again leading the way. The release of the new technology is TSMC's strong response to the challenges of Samsung and Intel. After the meeting, many analysts believed that the claim that Intel would take back the crown of chip manufacturing was too optimistic.

1. Launch a 3D optical engine to lay out next-generation communication technology

TSMC is preparing to use chip-making methods to make light modules, saving power consumption and space.

The optical module technology currently used in communication networks mainly consists of assembling individual components (see figure below).

As transmission rates increase, this integrated approach causes high power consumption issues.

To solve this problem, TSMC has launched a new optical module product. Simply put, the same technology used to make chips is used in the manufacture of optical modules. This method greatly reduces the size of the optical module, and further optimizes material costs, chip costs, and packaging costs.

This is a new type of optical module technology, and it is also the next generation communication technology recognized in the industry.

(TSMC 1.6T light engine product map)

However, TSMC is not the only player in the field of silicon optics, and manufacturers such as Global Foundries, IMEC, and PowerJazz have already made layouts. Since silicon chips are not an advanced manufacturing process, they are usually between 45nm and 130nm. Domestic silicon design companies basically seek OEM manufacturers such as Global Foundries, IMEC, and PowerJazz.

Compared to its peers, TSMC entered the silicon light market relatively late, but it is still ahead of Intel and Samsung. Furthermore, at this conference, TSMC revealed its ambitious light engine strategy, iterating once a year: launch a 1.6T pluggable optical engine in '25 and launch a 6.4T light engine in '26.

Considering TSMC's absolute position in the chip manufacturing field and the company's ambitious product strategy, TSMC will be a force that cannot be ignored in the silicon market in the future, and may seize the market share of companies that have developed in this field themselves.

2. Backside power supply helps demand for high-performance chips

Using a new power supply method, the space utilization rate of the chip is improved.

Regarding the chip's power supply method, the current mainstream practice in the market is to place the power supply on the front side of the chip, which causes the power supply to occupy the chip space.

The backside power supply technology introduced by TSMC this time has solved this problem.

In addition to TSMC, IMEC and Intel are also actively developing backside power supply technology. Compared with the three, IMEC has the lowest technical cost, but the performance is inferior to TSMC; TSMC has the highest technical cost, but the performance is the best. Overall, TSMC is superior in back-side power supply technology.

Overall, TSMC's new back-bottom power supply solution is an innovative technology that can improve chip performance, power efficiency, and area utilization. It is expected to be widely used in future mobile devices and data center chips.

3. In addition to 3D packaging, a new choice — “wafer-level system”

By interconnecting chips on wafers, data centers that are not limited by space can achieve faster interconnection speeds.

As the number of transistors on chips increases, the market requirements for chip integration are also getting higher and higher. In particular, in terminals such as mobile phones/computers, chips cannot be very large and must be compact, so they mainly use 3D packaging to integrate chips (vertically stacked chips).

However, in the face of data centers, the chip area requirement is not very high. TSMC has introduced a new chip integration solution — a “wafer-level system.”

This technology directly interconnects multiple chips on a wafer, and more is to expand the chip system horizontally (see figure below). It is expected that the size will reach 12x12cm after packaging in the future.

TSMC has successively launched a number of products using this technology. For example, the B100 GPU launched by Nvidia this year consists of two small Blackwell chips forming a B100 chip; Cerebras' “big chip” has 900,000 cores connected to the same wafer.

When it comes to wafer-level interconnection, TSMC is also far ahead of its two rivals, Intel and Samsung.

Overall, although TSMC's leading position has been challenged, it still dominates the wafer field. However, Haikou, which Intel boasted, was not that easy to achieve.