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Synopsys Accelerates Next-Level Chip Innovation On TSMC Advanced Processes

Benzinga ·  Apr 24 16:01

Collaboration on AI-Driven Design Flows for Optimization and Productivity, Advancements in Photonic IC Integration, Plus Broad IP Development on TSMC 2nm Technology

Highlights:

  • Production-ready digital and analog design flows, powered by Synopsys.ai EDA suite, on TSMC N3/N3P and N2 drive successful results and accelerate analog design migration
  • Certified Synopsys physical verification solution on TSMC N3P and N2 nodes accelerates full-chip physical signoff
  • Collaboration on silicon photonics leveraging Synopsys 3DIC Compiler and Photonics IC solution and TSMC's COUPE technology to further enhance system performance for AI and multi-die designs
  • Broad portfolio of Synopsys Foundation and Interface IP, in development for TSMC N2/N2P, and silicon-proven IP on N3P, shorten design time and reduce integration risk

SUNNYVALE, Calif., April 24, 2024 /PRNewswire/ -- Synopsys, Inc. (NASDAQ:SNPS) today announced broad EDA and IP collaborations with TSMC for advanced node designs and have been deployed across a range of AI, high-performance computing, and mobile designs. Among the newest collaborations is a co-optimized Photonic IC flow, addressing the application of silicon photonics technology in the quest for better power, performance, and transistor density. Synopsys also noted the industry's confidence in its digital and analog design flows, production-ready for TSMC N3/N3P and N2 process technologies. The two companies are collaborating on next-generation AI-driven flows, including Synopsys DSO.ai, for design productivity and optimization. In addition, Synopsys is developing a broad portfolio of Foundation and Interface IP on TSMC N2/N2P. In a related announcement today, Keysight, Synopsys, and Ansys introduced a new integrated radio frequency (RF) design migration flow from TSMC's N16 process to its N6RF+ technology.

"The advancements in Synopsys' production-ready EDA flows and photonics integration with our 3DIC Compiler, which supports the 3Dblox standard, combined with a broad IP portfolio enable Synopsys and TSMC to help designers achieve the next level of innovation for their chip designs on TSMC's advanced processes," said Sanjay Bali, vice president of strategy and product management for the EDA Group at Synopsys. "The deep trust we've built over decades of collaboration with TSMC has provided the industry with mission-critical EDA and IP solutions that deliver compelling quality-of-results and productivity gains with faster migration from node to node."

"Our close collaboration with Open Innovation Platform (OIP) ecosystem partners like Synopsys has enabled customers to address the most challenging design requirements, all at the leading edge of innovation from angstrom-scale devices to complex multi-die systems across a range of high-performance computing designs," said Dan Kochpatcharin, head of Design Infrastructure Management Division at TSMC. "Together, TSMC and Synopsys will help engineering teams create the next generation of differentiated designs on TSMC's most advanced process nodes with faster time to results."

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