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Synopsys Accelerates Next-Level Chip Innovation On TSMC Advanced Processes

Synopsys Accelerates Next-Level Chip Innovation On TSMC Advanced Processes

新思科技加速台积电先进工艺的下一级芯片创新
Benzinga ·  04/24 16:01

Collaboration on AI-Driven Design Flows for Optimization and Productivity, Advancements in Photonic IC Integration, Plus Broad IP Development on TSMC 2nm Technology

就人工智能驱动的设计流程进行合作,以实现优化和生产力,光子 IC 集成的进步,以及台积电 2nm 技术的广泛 IP 开发

Highlights:

亮点:

  • Production-ready digital and analog design flows, powered by Synopsys.ai EDA suite, on TSMC N3/N3P and N2 drive successful results and accelerate analog design migration
  • Certified Synopsys physical verification solution on TSMC N3P and N2 nodes accelerates full-chip physical signoff
  • Collaboration on silicon photonics leveraging Synopsys 3DIC Compiler and Photonics IC solution and TSMC's COUPE technology to further enhance system performance for AI and multi-die designs
  • Broad portfolio of Synopsys Foundation and Interface IP, in development for TSMC N2/N2P, and silicon-proven IP on N3P, shorten design time and reduce integration risk
  • 台积电 N3/N3P 和 N2 上可投入生产的数字和模拟设计流程由 Synopsys.ai EDA 套件提供支持,推动了成功的结果并加快了模拟设计迁移
  • 台积电 N3P 和 N2 节点上经过认证的 Synopsys 物理验证解决方案可加速全芯片物理签核
  • 利用新思科技 3DIC 编译器和光子学 IC 解决方案以及台积电的 COUPE 技术开展硅光子学合作,进一步增强人工智能和多晶片设计的系统性能
  • 正在为台积电N2/N2P开发的新思科技基础和接口IP的广泛产品组合,以及N3P上经过硅验证的IP产品组合,可缩短设计时间并降低集成风险

SUNNYVALE, Calif., April 24, 2024 /PRNewswire/ -- Synopsys, Inc. (NASDAQ:SNPS) today announced broad EDA and IP collaborations with TSMC for advanced node designs and have been deployed across a range of AI, high-performance computing, and mobile designs. Among the newest collaborations is a co-optimized Photonic IC flow, addressing the application of silicon photonics technology in the quest for better power, performance, and transistor density. Synopsys also noted the industry's confidence in its digital and analog design flows, production-ready for TSMC N3/N3P and N2 process technologies. The two companies are collaborating on next-generation AI-driven flows, including Synopsys DSO.ai, for design productivity and optimization. In addition, Synopsys is developing a broad portfolio of Foundation and Interface IP on TSMC N2/N2P. In a related announcement today, Keysight, Synopsys, and Ansys introduced a new integrated radio frequency (RF) design migration flow from TSMC's N16 process to its N6RF+ technology.

加利福尼亚州森尼维尔,2024年4月24日 /PRNewswire/ — 新思科技公司(纳斯达克股票代码:SNPS)今天宣布与台积电就高级节点设计开展广泛的EDA和IP合作,并已部署在一系列人工智能、高性能计算和移动设计中。最新的合作包括共同优化的光子集成电路流程,旨在解决硅光子学技术在寻求更高的功率、性能和晶体管密度方面的应用。新思科技还指出,业界对其数字和模拟设计流程充满信心,台积电N3/N3P和N2工艺技术已做好量产准备。两家公司正在合作开发下一代人工智能驱动流程,包括新思科技 DSO.ai,以提高设计效率和进行优化。此外,新思科技正在台积电N2/N2P上开发广泛的基础和接口IP产品组合。在今天的相关公告中,是德科技、新思科技和Ansys推出了一种新的集成射频(RF)设计迁移流程,从台积电的N16工艺迁移到其N6RF+技术。

"The advancements in Synopsys' production-ready EDA flows and photonics integration with our 3DIC Compiler, which supports the 3Dblox standard, combined with a broad IP portfolio enable Synopsys and TSMC to help designers achieve the next level of innovation for their chip designs on TSMC's advanced processes," said Sanjay Bali, vice president of strategy and product management for the EDA Group at Synopsys. "The deep trust we've built over decades of collaboration with TSMC has provided the industry with mission-critical EDA and IP solutions that deliver compelling quality-of-results and productivity gains with faster migration from node to node."

新思科技EDA集团战略和产品管理副总裁桑杰·巴利表示:“新思科技量产型EDA流程的进步以及与支持3Dblox标准的3DIC Compiler的光子学集成,加上广泛的IP产品组合,使新思科技和台积电能够帮助设计人员在台积电的先进工艺上实现芯片设计的更高创新水平。”“我们在与台积电数十年的合作中建立了深厚的信任,为业界提供了任务关键型EDA和IP解决方案,这些解决方案通过更快地从一个节点迁移到另一个节点来提供引人注目的结果质量和生产力提升。”

"Our close collaboration with Open Innovation Platform (OIP) ecosystem partners like Synopsys has enabled customers to address the most challenging design requirements, all at the leading edge of innovation from angstrom-scale devices to complex multi-die systems across a range of high-performance computing designs," said Dan Kochpatcharin, head of Design Infrastructure Management Division at TSMC. "Together, TSMC and Synopsys will help engineering teams create the next generation of differentiated designs on TSMC's most advanced process nodes with faster time to results."

台积电设计基础设施管理部负责人丹·科赫帕查林表示:“我们与新思科技等开放创新平台(OIP)生态系统合作伙伴的密切合作使客户能够满足最具挑战性的设计需求,所有这些需求都处于创新的前沿,从Angstrom规模的设备到涵盖一系列高性能计算设计的复杂多芯片系统。”“台积电和新思科技将共同帮助工程团队在台积电最先进的工艺节点上创建下一代差异化设计,从而更快地获得结果。”

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