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4DS Memory achieves new write speed milestone on Fourth Platform Lot

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By Imelda Cotton - 
4DS Memory ASX technology data storage fourth platform lot write speed ReRam memory
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Australian semiconductor developer 4DS Memory (ASX: 4DS) has completed further analysis of its memory system product Fourth Platform Lot, confirming stronger results compared to earlier testing in September.

The new tests were designed to investigate the speed and power efficiency of the product’s 60-nanometre memory cells in the megabit array.

Specifically, analysis of the Fourth Platform Lot verified that 4DS can offer reliable write speeds of 4.7 nanoseconds.

It is believed to be the fastest reported programming to date and significantly better than the dynamic random access memory (DRAM) write speed of 30nsec.

The memory cell programming is reportedly due to the phenomenon of electric pulse-induced resistance switching.

4DS has also been able to prove variable cell level writing by voltage or time pulse modification and persistent memory with low energy consumption.

Additionally, it has demonstrated the ability to control the level of programming by modification of programming voltage and time, or a combination of both.

Being able to program the memory cell to a specific value gives the cell an analog characteristic that can be used directly in applications where analog programming can assist in certain operations.

This added dimension of analog programmability expands the potential applications that 4DS can pursue and demonstrates the characteristics of the company’s interface switching resistive RAM (ReRAM) technology.

Industry leader

Executive chair David McAuliffe congratulated the 4DS team on their achievement.

“This clearly establishes 4DS as an industry leader in potentially bringing interface switching ReRAM to market and we welcome the opportunity to work with industry partners in memory, advanced artificial intelligence and foundry services to explore how [we] can deliver added competitiveness and higher performance to their offerings,” he said.

Industry veteran and 4DS board advisor Peter Himes said it was a significant technical milestone.

“At 4.7nsec, the 4DS memory cell requires one of the lowest energy per bit [rates] of any persistent memory solution and operating within the DRAM refresh cycle means the cell can be refreshed as needed, maintaining persistent memory virtually indefinitely at very low energy consumption,” he explained.

“Being able to program with a one-shot pulse – as opposed to iterative programming that is needed for most other memory technologies – means that 4DS can truly respond at DRAM speeds without the penalty of constant DRAM refreshes […] it opens up new possibilities for 4DS in the memory space as well.”

September analysis

In September 2023, a 4DS analysis of Fourth Platform Lot reported write speeds of 9.5 nanoseconds with an endurance of 3 billion cycles and variable and tunable retention characteristics of the memory cell.

The company’s technical team has since continued to characterise Fourth Platform Lot to enable a greater understanding of the technology’s underlying performance characteristics.

This includes the response of the 4DS cell under different conditions, including programming voltage and time changes, which demonstrate the flexibility of interface-switching ReRAM.