Restricting TSMC benefits SMIC, multi-patterning prohibitively costly, said lithography guru
With the ongoing US-China tensions, Huawei exemplified its ability to make 7nm chips without EUV equipment, and chip guru Burn Lin believes it's not surprising for Huawei to achieve the milestone, but making 5nm chips with multi-patterning on DUV equipment will be costly.
Burn Lin, the former TSMC vice president of R&D who innovated immersion lithography, told IC Broadcasting that he had already foreseen in 2022 that SMIC could achieve 7nm with DUV equipment, just as TSMC did. However, he said that making 5nm chips with DUV equipment involves at least quadruple patterning - a process that is time-consuming and costly and affects yield rates and speed due to difficulties in self-alignment.
Lin said that the 28nm platform doesn't involve multiple patterning on immersive DUV equipment, making it the most cost-effective process for chipmaking. However, he said, for 28nm process and below, double, triple, or multiple patterning are required, making them time-consuming and costly. For example, equipment that can do single exposure with the speed of 250 wafers an hour can do double exposure with half of the speed, and so forth. $Taiwan Semiconductor(TSM.US$ $Nasdaq Composite Index(.IXIC.US$ $NVIDIA(NVDA.US$
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